(a) Field of the Invention
The present invention relates to a semiconductor integrated circuit device including SRAMs and ROMs and a method for manufacturing the same.
(b) Description of Related Art
In the field of LSI (large-scale integrated circuit), reduction of leak current which flows while the MOS transistors are in the off state (off-leak current) is one of important objects to achieve. For reduction of the off-leak current, in general, there has been employed a technique of increasing the threshold voltage of the MOS transistor.
Specific means of increasing the threshold voltage of the MOS transistor have been disclosed, for example, a method of increasing a channel impurity concentration and a method of controlling a substrate bias. For example, Japanese Unexamined Patent Publication No. 11-195976 discloses a method of selectively increasing the threshold voltage of a certain MOS transistor on a circuit.
However, MOS transistors in a practical LSI do not have the same threshold voltage and in most cases they have different threshold voltages. Accordingly, it is not easy to selectively increase the threshold voltage of a certain MOS transistor. For example, with a decrease in channel width of the MOS transistor, an electric field is generated locally at the edge of an active region below a gate electrode of the MOS transistor, thereby causing an inverse narrow channel effect of great influence. Therefore, the threshold voltage of the MOS transistor may possibly decrease with the decrease in channel width.
In particular, on an LSI including SRAMs, ROMs and logic circuits in combination, MOS transistors of different channel widths are provided for the SRAMs, ROMs and logic circuits, respectively. Accordingly, the influence of the inverse narrow channel effect also varies among the MOS transistors and the MOS transistors will have different threshold voltages.
For example, Japanese Unexamined Patent Publication No. 2000-133701 proposes improvements of a process for suppressing the inverse narrow channel effect.